Article: European Processor Initiative Tapes Out Their First RISC-V Test Chip

Hardware, Open Source, Software

European Processor Initiative Tapes Out Their First RISC-V Test Chip

The EPI recently announced that it has developed its first RISC-V device, the EPAC1.0, a RISC vector processor using the RISC-V ISA. Using the RISC-V architecture, the device can work with software libraries and other developments in the RISC-V environment. Furthermore, RISC-V removes the need for royalties and licenses when manufacturing processors that free the EPI from any outside commercial interest.

While RISC-V is nowhere near as popular as x86 or ARM, it is starting to gain traction and will undoubtedly become a major competitor. In addition, the use of an open-source ISA enables any manufacturer to create their own code-compatible CPU without worrying about licenses or royalties, which supports the development of lower-priced processors and encourages the use of open-source hardware.

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Article: What is Software-Defined Storage?

Hardware, Open Source, Software

What is Software-Defined Storage?

Depending on where you research, Software-Defined Storage, or SDS, will be described as a scalable solution that enables platforms to utilise open-source software and off-the-shelf hardware to create a storage solution that can save money and enable software systems to interact with storage intelligently. Now, for the real definition of SDS!

Software-Defined storage, simply put, is a storage solution that provides advanced storage mechanisms, but these mechanisms are defined in software. Another way to think of it is replacing drive controllers with software. For example, RAID controllers allow for drives to be used in different configurations, but an SDS would remove the RAID controller, and implement this function in software instead.

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